The invention was designed as an improvement over two areas of the prior art. The first area concerns bus arbiters which in a given system provide hardware controlled, predetermined arbitration. The improvement to this area results in a more versatile, flexible system provided by the addition of software control of the arbiter and bus.
The second area involves the application of the first area to a distributed array processing system to provide a high degree of simultaneous, overlapped processing. Both of these areas are further explained in more detail below.
The architecture of the IBM Instruments Computer System, Type 9000, commercially available from IBM Instruments Inc., Danbury, Conn., is based on a Motorola MC68000 16-bit microprocessor. Such system includes a system bus connected to the processor, to a random access memory, and to a variety of modules or devices that transfer data over the bus under the control of the processor and a bus arbiter. The arbiter has prioritized input lines connected respectively to the various devices according to a desired order of priority. The arbiter also has output lines respectively connected to the devices.
In the operation of such system, the processor has the lowest priority for use by the bus and it can use the bus only when no request has been made from any of the other devices. Bus requests are made asynchronously by the requesting devices and it is necessary to complete the current bus cycle before a new request can be honored. When more than one bus request is made, at any given time, the arbiter decides which device will be granted control over the bus or become the master thereof, and a single bus grant signal is sent to such device allowing the transfer to be made. The device, when it exercises control, places a bus grant acknowledge signal on the bus. While the operation of such system is quite satisfactory for most applications, there nevertheless appears to be certain applications where it is desirable to be able to either override the arbiter or disable it so as to grant use of the bus selectively to a given device regardless of its normal priority. There are also times when it is desirable to effectively mask out bus request signals.
The array processing system embodying the invention is designed to use the above mentioned IBM Instruments Computer System as a host system and includes an array processor connected to the host system in a distributed processing network or system. Such array processing system is designed as a very low cost one, for performing a variety of the array operations like those of in the IBM 3838 Array Processor. The general nature of the new array processing system, however, requires problem programs to be executed, not in the host system as with the 3838, but in the array processor itself. To accomplish this operation, the array processor includes a process control unit (PCU), an arithmetic unit (AU), storage and a data transfer controller (DTC), interconnected with each other and the host system via a network of buses. To achieve high performance, the system operates in a highly overlapped fashion to carry out simultaneous functions. The high degree of overlap is partially accomplished by interconnecting the various buses through selectively enabled redrivers or switches which function to selectively electrically connect or isolate the buses.
While the preceding paragraph describes the general environment of the invention, the more specific environment involves control of the PCU master port and its bus segment via the PCU bus arbiter. The PCU generally provides the primary level of control of the array processor via a bus network structure which exists both within and outside of the PCU. However, the PCU arbiter which controls disposition of the PCU Master Port resources can itself limit flexibility of operation, unless some means is provided to allow PCU software interaction with bus arbitration activity. In general, this means facility to generate bus grants and to mask hardware input bus requests as a function of PCU software execution.